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/S2_L3A_WASP/files/32/U/QV/2024/SENTINEL2X_20240415-000000-000_L3A_T32UQV_C_V1-2/
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DATA/-2024-05-13 19:11:58
MASKS/-2024-05-13 19:11:58
SENTINEL2X_20240415-000000-000_L3A_T32UQV_C_V1-2_FRC_B11.tif58.0 MiB2024-05-13 19:12:07
SENTINEL2X_20240415-000000-000_L3A_T32UQV_C_V1-2_FRC_B12.tif56.8 MiB2024-05-13 19:12:07
SENTINEL2X_20240415-000000-000_L3A_T32UQV_C_V1-2_FRC_B2.tif195.7 MiB2024-05-13 19:12:00
SENTINEL2X_20240415-000000-000_L3A_T32UQV_C_V1-2_FRC_B3.tif209.0 MiB2024-05-13 19:12:01
SENTINEL2X_20240415-000000-000_L3A_T32UQV_C_V1-2_FRC_B4.tif210.4 MiB2024-05-13 19:12:03
SENTINEL2X_20240415-000000-000_L3A_T32UQV_C_V1-2_FRC_B5.tif56.4 MiB2024-05-13 19:12:05
SENTINEL2X_20240415-000000-000_L3A_T32UQV_C_V1-2_FRC_B6.tif59.6 MiB2024-05-13 19:12:05
SENTINEL2X_20240415-000000-000_L3A_T32UQV_C_V1-2_FRC_B7.tif60.9 MiB2024-05-13 19:12:06
SENTINEL2X_20240415-000000-000_L3A_T32UQV_C_V1-2_FRC_B8.tif238.7 MiB2024-05-13 19:12:05
SENTINEL2X_20240415-000000-000_L3A_T32UQV_C_V1-2_FRC_B8A.tif61.1 MiB2024-05-13 19:12:06
SENTINEL2X_20240415-000000-000_L3A_T32UQV_C_V1-2_MTD_ALL.xml19.7 KiB2024-05-13 19:12:07
SENTINEL2X_20240415-000000-000_L3A_T32UQV_C_V1-2_QKL_ALL.jpg476.4 KiB2024-05-13 19:12:07