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/S2_L3A_WASP/files/32/U/QU/2023/SENTINEL2X_20230315-000000-000_L3A_T32UQU_C_V1-2/
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Parent directory/--
DATA/-2023-04-21 22:41:31
MASKS/-2023-04-21 22:41:32
SENTINEL2X_20230315-000000-000_L3A_T32UQU_C_V1-2_FRC_B11.tif57.3 MiB2023-04-21 22:41:51
SENTINEL2X_20230315-000000-000_L3A_T32UQU_C_V1-2_FRC_B12.tif55.7 MiB2023-04-21 22:41:52
SENTINEL2X_20230315-000000-000_L3A_T32UQU_C_V1-2_FRC_B2.tif197.8 MiB2023-04-21 22:41:35
SENTINEL2X_20230315-000000-000_L3A_T32UQU_C_V1-2_FRC_B3.tif204.8 MiB2023-04-21 22:41:39
SENTINEL2X_20230315-000000-000_L3A_T32UQU_C_V1-2_FRC_B4.tif209.7 MiB2023-04-21 22:41:42
SENTINEL2X_20230315-000000-000_L3A_T32UQU_C_V1-2_FRC_B5.tif55.9 MiB2023-04-21 22:41:47
SENTINEL2X_20230315-000000-000_L3A_T32UQU_C_V1-2_FRC_B6.tif59.5 MiB2023-04-21 22:41:48
SENTINEL2X_20230315-000000-000_L3A_T32UQU_C_V1-2_FRC_B7.tif60.3 MiB2023-04-21 22:41:49
SENTINEL2X_20230315-000000-000_L3A_T32UQU_C_V1-2_FRC_B8.tif235.6 MiB2023-04-21 22:41:46
SENTINEL2X_20230315-000000-000_L3A_T32UQU_C_V1-2_FRC_B8A.tif60.7 MiB2023-04-21 22:41:50
SENTINEL2X_20230315-000000-000_L3A_T32UQU_C_V1-2_MTD_ALL.xml19.7 KiB2023-04-21 22:41:52
SENTINEL2X_20230315-000000-000_L3A_T32UQU_C_V1-2_QKL_ALL.jpg413.4 KiB2023-04-21 22:41:52