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/S2_L3A_WASP/files/32/U/QC/2022/SENTINEL2A_20221215-000000-000_L3A_T32UQC_C_V1-2/
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DATA/-2023-01-14 20:50:34
MASKS/-2023-01-14 20:50:34
SENTINEL2A_20221215-000000-000_L3A_T32UQC_C_V1-2_FRC_B11.tif55.6 MiB2023-01-14 20:50:52
SENTINEL2A_20221215-000000-000_L3A_T32UQC_C_V1-2_FRC_B12.tif53.0 MiB2023-01-14 20:50:53
SENTINEL2A_20221215-000000-000_L3A_T32UQC_C_V1-2_FRC_B2.tif183.4 MiB2023-01-14 20:50:37
SENTINEL2A_20221215-000000-000_L3A_T32UQC_C_V1-2_FRC_B3.tif197.5 MiB2023-01-14 20:50:40
SENTINEL2A_20221215-000000-000_L3A_T32UQC_C_V1-2_FRC_B4.tif196.4 MiB2023-01-14 20:50:44
SENTINEL2A_20221215-000000-000_L3A_T32UQC_C_V1-2_FRC_B5.tif54.5 MiB2023-01-14 20:50:48
SENTINEL2A_20221215-000000-000_L3A_T32UQC_C_V1-2_FRC_B6.tif59.1 MiB2023-01-14 20:50:49
SENTINEL2A_20221215-000000-000_L3A_T32UQC_C_V1-2_FRC_B7.tif59.8 MiB2023-01-14 20:50:50
SENTINEL2A_20221215-000000-000_L3A_T32UQC_C_V1-2_FRC_B8.tif235.7 MiB2023-01-14 20:50:47
SENTINEL2A_20221215-000000-000_L3A_T32UQC_C_V1-2_FRC_B8A.tif60.2 MiB2023-01-14 20:50:51
SENTINEL2A_20221215-000000-000_L3A_T32UQC_C_V1-2_MTD_ALL.xml16.9 KiB2023-01-14 20:50:53
SENTINEL2A_20221215-000000-000_L3A_T32UQC_C_V1-2_QKL_ALL.jpg295.9 KiB2023-01-14 20:50:53