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/S2_L3A_WASP/files/32/U/QA/2022/SENTINEL2A_20221215-000000-000_L3A_T32UQA_C_V1-2/
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DATA/-2023-01-27 16:00:22
MASKS/-2023-01-27 16:00:22
SENTINEL2A_20221215-000000-000_L3A_T32UQA_C_V1-2_FRC_B11.tif52.1 MiB2023-01-27 16:00:41
SENTINEL2A_20221215-000000-000_L3A_T32UQA_C_V1-2_FRC_B12.tif51.0 MiB2023-01-27 16:00:41
SENTINEL2A_20221215-000000-000_L3A_T32UQA_C_V1-2_FRC_B2.tif199.8 MiB2023-01-27 16:00:25
SENTINEL2A_20221215-000000-000_L3A_T32UQA_C_V1-2_FRC_B3.tif202.9 MiB2023-01-27 16:00:29
SENTINEL2A_20221215-000000-000_L3A_T32UQA_C_V1-2_FRC_B4.tif200.0 MiB2023-01-27 16:00:32
SENTINEL2A_20221215-000000-000_L3A_T32UQA_C_V1-2_FRC_B5.tif54.6 MiB2023-01-27 16:00:37
SENTINEL2A_20221215-000000-000_L3A_T32UQA_C_V1-2_FRC_B6.tif57.1 MiB2023-01-27 16:00:38
SENTINEL2A_20221215-000000-000_L3A_T32UQA_C_V1-2_FRC_B7.tif57.3 MiB2023-01-27 16:00:39
SENTINEL2A_20221215-000000-000_L3A_T32UQA_C_V1-2_FRC_B8.tif222.9 MiB2023-01-27 16:00:36
SENTINEL2A_20221215-000000-000_L3A_T32UQA_C_V1-2_FRC_B8A.tif57.5 MiB2023-01-27 16:00:40
SENTINEL2A_20221215-000000-000_L3A_T32UQA_C_V1-2_MTD_ALL.xml15.6 KiB2023-01-27 16:00:41
SENTINEL2A_20221215-000000-000_L3A_T32UQA_C_V1-2_QKL_ALL.jpg573.0 KiB2023-01-27 16:00:41