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/S2_L3A_WASP/files/32/U/PV/2023/SENTINEL2X_20230815-000000-000_L3A_T32UPV_C_V1-2/
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Parent directory/--
DATA/-2023-09-09 08:02:39
MASKS/-2023-09-09 08:02:40
SENTINEL2X_20230815-000000-000_L3A_T32UPV_C_V1-2_FRC_B11.tif57.7 MiB2023-09-09 08:02:59
SENTINEL2X_20230815-000000-000_L3A_T32UPV_C_V1-2_FRC_B12.tif56.3 MiB2023-09-09 08:03:00
SENTINEL2X_20230815-000000-000_L3A_T32UPV_C_V1-2_FRC_B2.tif191.6 MiB2023-09-09 08:02:44
SENTINEL2X_20230815-000000-000_L3A_T32UPV_C_V1-2_FRC_B3.tif203.2 MiB2023-09-09 08:02:47
SENTINEL2X_20230815-000000-000_L3A_T32UPV_C_V1-2_FRC_B4.tif204.2 MiB2023-09-09 08:02:50
SENTINEL2X_20230815-000000-000_L3A_T32UPV_C_V1-2_FRC_B5.tif55.4 MiB2023-09-09 08:02:55
SENTINEL2X_20230815-000000-000_L3A_T32UPV_C_V1-2_FRC_B6.tif59.5 MiB2023-09-09 08:02:56
SENTINEL2X_20230815-000000-000_L3A_T32UPV_C_V1-2_FRC_B7.tif60.8 MiB2023-09-09 08:02:57
SENTINEL2X_20230815-000000-000_L3A_T32UPV_C_V1-2_FRC_B8.tif238.6 MiB2023-09-09 08:02:54
SENTINEL2X_20230815-000000-000_L3A_T32UPV_C_V1-2_FRC_B8A.tif61.0 MiB2023-09-09 08:02:58
SENTINEL2X_20230815-000000-000_L3A_T32UPV_C_V1-2_MTD_ALL.xml25.3 KiB2023-09-09 08:03:00
SENTINEL2X_20230815-000000-000_L3A_T32UPV_C_V1-2_QKL_ALL.jpg455.2 KiB2023-09-09 08:03:00