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/S2_L3A_WASP/files/32/U/PU/2023/SENTINEL2X_20230915-000000-000_L3A_T32UPU_C_V1-2/
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DATA/-2023-10-11 00:00:38
MASKS/-2023-10-11 00:00:39
SENTINEL2X_20230915-000000-000_L3A_T32UPU_C_V1-2_FRC_B11.tif57.5 MiB2023-10-11 00:00:58
SENTINEL2X_20230915-000000-000_L3A_T32UPU_C_V1-2_FRC_B12.tif56.2 MiB2023-10-11 00:00:59
SENTINEL2X_20230915-000000-000_L3A_T32UPU_C_V1-2_FRC_B2.tif191.6 MiB2023-10-11 00:00:42
SENTINEL2X_20230915-000000-000_L3A_T32UPU_C_V1-2_FRC_B3.tif204.0 MiB2023-10-11 00:00:46
SENTINEL2X_20230915-000000-000_L3A_T32UPU_C_V1-2_FRC_B4.tif203.6 MiB2023-10-11 00:00:49
SENTINEL2X_20230915-000000-000_L3A_T32UPU_C_V1-2_FRC_B5.tif55.4 MiB2023-10-11 00:00:54
SENTINEL2X_20230915-000000-000_L3A_T32UPU_C_V1-2_FRC_B6.tif59.7 MiB2023-10-11 00:00:55
SENTINEL2X_20230915-000000-000_L3A_T32UPU_C_V1-2_FRC_B7.tif60.7 MiB2023-10-11 00:00:56
SENTINEL2X_20230915-000000-000_L3A_T32UPU_C_V1-2_FRC_B8.tif238.1 MiB2023-10-11 00:00:53
SENTINEL2X_20230915-000000-000_L3A_T32UPU_C_V1-2_FRC_B8A.tif60.9 MiB2023-10-11 00:00:57
SENTINEL2X_20230915-000000-000_L3A_T32UPU_C_V1-2_MTD_ALL.xml26.7 KiB2023-10-11 00:00:59
SENTINEL2X_20230915-000000-000_L3A_T32UPU_C_V1-2_QKL_ALL.jpg441.4 KiB2023-10-11 00:00:59