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/S2_L3A_WASP/files/32/U/PU/2023/SENTINEL2X_20230615-000000-000_L3A_T32UPU_C_V1-2/
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DATA/-2023-07-12 13:59:46
MASKS/-2023-07-12 13:59:47
SENTINEL2X_20230615-000000-000_L3A_T32UPU_C_V1-2_FRC_B11.tif58.4 MiB2023-07-12 14:00:07
SENTINEL2X_20230615-000000-000_L3A_T32UPU_C_V1-2_FRC_B12.tif57.3 MiB2023-07-12 14:00:08
SENTINEL2X_20230615-000000-000_L3A_T32UPU_C_V1-2_FRC_B2.tif193.9 MiB2023-07-12 13:59:51
SENTINEL2X_20230615-000000-000_L3A_T32UPU_C_V1-2_FRC_B3.tif207.1 MiB2023-07-12 13:59:54
SENTINEL2X_20230615-000000-000_L3A_T32UPU_C_V1-2_FRC_B4.tif207.9 MiB2023-07-12 13:59:58
SENTINEL2X_20230615-000000-000_L3A_T32UPU_C_V1-2_FRC_B5.tif56.1 MiB2023-07-12 14:00:03
SENTINEL2X_20230615-000000-000_L3A_T32UPU_C_V1-2_FRC_B6.tif59.3 MiB2023-07-12 14:00:04
SENTINEL2X_20230615-000000-000_L3A_T32UPU_C_V1-2_FRC_B7.tif60.7 MiB2023-07-12 14:00:05
SENTINEL2X_20230615-000000-000_L3A_T32UPU_C_V1-2_FRC_B8.tif238.8 MiB2023-07-12 14:00:02
SENTINEL2X_20230615-000000-000_L3A_T32UPU_C_V1-2_FRC_B8A.tif61.0 MiB2023-07-12 14:00:06
SENTINEL2X_20230615-000000-000_L3A_T32UPU_C_V1-2_MTD_ALL.xml30.9 KiB2023-07-12 14:00:08
SENTINEL2X_20230615-000000-000_L3A_T32UPU_C_V1-2_QKL_ALL.jpg482.0 KiB2023-07-12 14:00:08