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/S2_L3A_WASP/files/32/U/PF/2024/SENTINEL2X_20240515-000000-000_L3A_T32UPF_C_V1-2/
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DATA/-2024-06-13 07:05:27
MASKS/-2024-06-13 07:05:28
SENTINEL2X_20240515-000000-000_L3A_T32UPF_C_V1-2_FRC_B11.tif36.9 MiB2024-06-13 07:05:35
SENTINEL2X_20240515-000000-000_L3A_T32UPF_C_V1-2_FRC_B12.tif36.4 MiB2024-06-13 07:05:35
SENTINEL2X_20240515-000000-000_L3A_T32UPF_C_V1-2_FRC_B2.tif154.1 MiB2024-06-13 07:05:29
SENTINEL2X_20240515-000000-000_L3A_T32UPF_C_V1-2_FRC_B3.tif156.6 MiB2024-06-13 07:05:30
SENTINEL2X_20240515-000000-000_L3A_T32UPF_C_V1-2_FRC_B4.tif152.1 MiB2024-06-13 07:05:32
SENTINEL2X_20240515-000000-000_L3A_T32UPF_C_V1-2_FRC_B5.tif38.6 MiB2024-06-13 07:05:33
SENTINEL2X_20240515-000000-000_L3A_T32UPF_C_V1-2_FRC_B6.tif39.6 MiB2024-06-13 07:05:34
SENTINEL2X_20240515-000000-000_L3A_T32UPF_C_V1-2_FRC_B7.tif40.2 MiB2024-06-13 07:05:34
SENTINEL2X_20240515-000000-000_L3A_T32UPF_C_V1-2_FRC_B8.tif157.4 MiB2024-06-13 07:05:33
SENTINEL2X_20240515-000000-000_L3A_T32UPF_C_V1-2_FRC_B8A.tif40.3 MiB2024-06-13 07:05:34
SENTINEL2X_20240515-000000-000_L3A_T32UPF_C_V1-2_MTD_ALL.xml36.5 KiB2024-06-13 07:05:35
SENTINEL2X_20240515-000000-000_L3A_T32UPF_C_V1-2_QKL_ALL.jpg212.9 KiB2024-06-13 07:05:35