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/S2_L3A_WASP/files/32/U/PE/2022/SENTINEL2X_20221215-000000-000_L3A_T32UPE_C_V1-2/
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DATA/-2023-01-27 16:15:11
MASKS/-2023-01-27 16:15:12
SENTINEL2X_20221215-000000-000_L3A_T32UPE_C_V1-2_FRC_B11.tif48.0 MiB2023-01-27 16:15:31
SENTINEL2X_20221215-000000-000_L3A_T32UPE_C_V1-2_FRC_B12.tif48.8 MiB2023-01-27 16:15:32
SENTINEL2X_20221215-000000-000_L3A_T32UPE_C_V1-2_FRC_B2.tif219.3 MiB2023-01-27 16:15:15
SENTINEL2X_20221215-000000-000_L3A_T32UPE_C_V1-2_FRC_B3.tif212.1 MiB2023-01-27 16:15:19
SENTINEL2X_20221215-000000-000_L3A_T32UPE_C_V1-2_FRC_B4.tif208.4 MiB2023-01-27 16:15:23
SENTINEL2X_20221215-000000-000_L3A_T32UPE_C_V1-2_FRC_B5.tif57.5 MiB2023-01-27 16:15:27
SENTINEL2X_20221215-000000-000_L3A_T32UPE_C_V1-2_FRC_B6.tif59.2 MiB2023-01-27 16:15:28
SENTINEL2X_20221215-000000-000_L3A_T32UPE_C_V1-2_FRC_B7.tif59.5 MiB2023-01-27 16:15:29
SENTINEL2X_20221215-000000-000_L3A_T32UPE_C_V1-2_FRC_B8.tif230.0 MiB2023-01-27 16:15:26
SENTINEL2X_20221215-000000-000_L3A_T32UPE_C_V1-2_FRC_B8A.tif59.8 MiB2023-01-27 16:15:31
SENTINEL2X_20221215-000000-000_L3A_T32UPE_C_V1-2_MTD_ALL.xml16.9 KiB2023-01-27 16:15:32
SENTINEL2X_20221215-000000-000_L3A_T32UPE_C_V1-2_QKL_ALL.jpg600.1 KiB2023-01-27 16:15:32