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/S2_L3A_WASP/files/32/U/PD/2024/SENTINEL2X_20240915-000000-000_L3A_T32UPD_C_V1-2/
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DATA/-2024-10-15 23:52:01
MASKS/-2024-10-15 23:52:02
SENTINEL2X_20240915-000000-000_L3A_T32UPD_C_V1-2_FRC_B11.tif57.5 MiB2024-10-15 23:52:11
SENTINEL2X_20240915-000000-000_L3A_T32UPD_C_V1-2_FRC_B12.tif56.1 MiB2024-10-15 23:52:11
SENTINEL2X_20240915-000000-000_L3A_T32UPD_C_V1-2_FRC_B2.tif187.2 MiB2024-10-15 23:52:03
SENTINEL2X_20240915-000000-000_L3A_T32UPD_C_V1-2_FRC_B3.tif200.2 MiB2024-10-15 23:52:05
SENTINEL2X_20240915-000000-000_L3A_T32UPD_C_V1-2_FRC_B4.tif203.1 MiB2024-10-15 23:52:07
SENTINEL2X_20240915-000000-000_L3A_T32UPD_C_V1-2_FRC_B5.tif54.9 MiB2024-10-15 23:52:09
SENTINEL2X_20240915-000000-000_L3A_T32UPD_C_V1-2_FRC_B6.tif58.5 MiB2024-10-15 23:52:10
SENTINEL2X_20240915-000000-000_L3A_T32UPD_C_V1-2_FRC_B7.tif59.5 MiB2024-10-15 23:52:10
SENTINEL2X_20240915-000000-000_L3A_T32UPD_C_V1-2_FRC_B8.tif235.0 MiB2024-10-15 23:52:09
SENTINEL2X_20240915-000000-000_L3A_T32UPD_C_V1-2_FRC_B8A.tif59.7 MiB2024-10-15 23:52:10
SENTINEL2X_20240915-000000-000_L3A_T32UPD_C_V1-2_MTD_ALL.xml30.9 KiB2024-10-15 23:52:11
SENTINEL2X_20240915-000000-000_L3A_T32UPD_C_V1-2_QKL_ALL.jpg417.0 KiB2024-10-15 23:52:11