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/S2_L3A_WASP/files/32/U/PD/2023/SENTINEL2X_20230915-000000-000_L3A_T32UPD_C_V1-2/
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DATA/-2023-10-08 22:53:30
MASKS/-2023-10-08 22:53:31
SENTINEL2X_20230915-000000-000_L3A_T32UPD_C_V1-2_FRC_B11.tif57.0 MiB2023-10-08 22:53:51
SENTINEL2X_20230915-000000-000_L3A_T32UPD_C_V1-2_FRC_B12.tif55.5 MiB2023-10-08 22:53:52
SENTINEL2X_20230915-000000-000_L3A_T32UPD_C_V1-2_FRC_B2.tif185.4 MiB2023-10-08 22:53:35
SENTINEL2X_20230915-000000-000_L3A_T32UPD_C_V1-2_FRC_B3.tif197.8 MiB2023-10-08 22:53:38
SENTINEL2X_20230915-000000-000_L3A_T32UPD_C_V1-2_FRC_B4.tif199.8 MiB2023-10-08 22:53:42
SENTINEL2X_20230915-000000-000_L3A_T32UPD_C_V1-2_FRC_B5.tif54.2 MiB2023-10-08 22:53:47
SENTINEL2X_20230915-000000-000_L3A_T32UPD_C_V1-2_FRC_B6.tif58.5 MiB2023-10-08 22:53:48
SENTINEL2X_20230915-000000-000_L3A_T32UPD_C_V1-2_FRC_B7.tif59.6 MiB2023-10-08 22:53:49
SENTINEL2X_20230915-000000-000_L3A_T32UPD_C_V1-2_FRC_B8.tif234.2 MiB2023-10-08 22:53:46
SENTINEL2X_20230915-000000-000_L3A_T32UPD_C_V1-2_FRC_B8A.tif59.8 MiB2023-10-08 22:53:50
SENTINEL2X_20230915-000000-000_L3A_T32UPD_C_V1-2_MTD_ALL.xml25.3 KiB2023-10-08 22:53:52
SENTINEL2X_20230915-000000-000_L3A_T32UPD_C_V1-2_QKL_ALL.jpg400.6 KiB2023-10-08 22:53:52