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/S2_L3A_WASP/files/32/U/PD/2023/SENTINEL2A_20230215-000000-000_L3A_T32UPD_C_V1-2/
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Parent directory/--
DATA/-2023-03-22 02:14:27
MASKS/-2023-03-22 02:14:27
SENTINEL2A_20230215-000000-000_L3A_T32UPD_C_V1-2_FRC_B11.tif56.9 MiB2023-03-22 02:14:46
SENTINEL2A_20230215-000000-000_L3A_T32UPD_C_V1-2_FRC_B12.tif54.9 MiB2023-03-22 02:14:47
SENTINEL2A_20230215-000000-000_L3A_T32UPD_C_V1-2_FRC_B2.tif183.1 MiB2023-03-22 02:14:31
SENTINEL2A_20230215-000000-000_L3A_T32UPD_C_V1-2_FRC_B3.tif200.3 MiB2023-03-22 02:14:34
SENTINEL2A_20230215-000000-000_L3A_T32UPD_C_V1-2_FRC_B4.tif200.4 MiB2023-03-22 02:14:37
SENTINEL2A_20230215-000000-000_L3A_T32UPD_C_V1-2_FRC_B5.tif55.1 MiB2023-03-22 02:14:42
SENTINEL2A_20230215-000000-000_L3A_T32UPD_C_V1-2_FRC_B6.tif59.1 MiB2023-03-22 02:14:43
SENTINEL2A_20230215-000000-000_L3A_T32UPD_C_V1-2_FRC_B7.tif59.8 MiB2023-03-22 02:14:44
SENTINEL2A_20230215-000000-000_L3A_T32UPD_C_V1-2_FRC_B8.tif235.2 MiB2023-03-22 02:14:41
SENTINEL2A_20230215-000000-000_L3A_T32UPD_C_V1-2_FRC_B8A.tif60.0 MiB2023-03-22 02:14:45
SENTINEL2A_20230215-000000-000_L3A_T32UPD_C_V1-2_MTD_ALL.xml16.9 KiB2023-03-22 02:14:47
SENTINEL2A_20230215-000000-000_L3A_T32UPD_C_V1-2_QKL_ALL.jpg329.7 KiB2023-03-22 02:14:47