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/S2_L3A_WASP/files/32/U/PD/2022/SENTINEL2X_20221215-000000-000_L3A_T32UPD_C_V1-2/
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DATA/-2023-01-11 22:38:25
MASKS/-2023-01-11 22:38:26
SENTINEL2X_20221215-000000-000_L3A_T32UPD_C_V1-2_FRC_B11.tif52.0 MiB2023-01-11 22:38:44
SENTINEL2X_20221215-000000-000_L3A_T32UPD_C_V1-2_FRC_B12.tif50.0 MiB2023-01-11 22:38:44
SENTINEL2X_20221215-000000-000_L3A_T32UPD_C_V1-2_FRC_B2.tif163.9 MiB2023-01-11 22:38:28
SENTINEL2X_20221215-000000-000_L3A_T32UPD_C_V1-2_FRC_B3.tif173.3 MiB2023-01-11 22:38:31
SENTINEL2X_20221215-000000-000_L3A_T32UPD_C_V1-2_FRC_B4.tif173.6 MiB2023-01-11 22:38:34
SENTINEL2X_20221215-000000-000_L3A_T32UPD_C_V1-2_FRC_B5.tif52.8 MiB2023-01-11 22:38:40
SENTINEL2X_20221215-000000-000_L3A_T32UPD_C_V1-2_FRC_B6.tif59.9 MiB2023-01-11 22:38:41
SENTINEL2X_20221215-000000-000_L3A_T32UPD_C_V1-2_FRC_B7.tif60.4 MiB2023-01-11 22:38:42
SENTINEL2X_20221215-000000-000_L3A_T32UPD_C_V1-2_FRC_B8.tif240.2 MiB2023-01-11 22:38:39
SENTINEL2X_20221215-000000-000_L3A_T32UPD_C_V1-2_FRC_B8A.tif60.8 MiB2023-01-11 22:38:43
SENTINEL2X_20221215-000000-000_L3A_T32UPD_C_V1-2_MTD_ALL.xml15.6 KiB2023-01-11 22:38:44
SENTINEL2X_20221215-000000-000_L3A_T32UPD_C_V1-2_QKL_ALL.jpg535.9 KiB2023-01-11 22:38:44