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/S2_L3A_WASP/files/32/U/PC/2024/SENTINEL2X_20240515-000000-000_L3A_T32UPC_C_V1-2/
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DATA/-2024-06-12 20:23:37
MASKS/-2024-06-12 20:23:38
SENTINEL2X_20240515-000000-000_L3A_T32UPC_C_V1-2_FRC_B11.tif56.0 MiB2024-06-12 20:23:46
SENTINEL2X_20240515-000000-000_L3A_T32UPC_C_V1-2_FRC_B12.tif54.9 MiB2024-06-12 20:23:46
SENTINEL2X_20240515-000000-000_L3A_T32UPC_C_V1-2_FRC_B2.tif190.4 MiB2024-06-12 20:23:39
SENTINEL2X_20240515-000000-000_L3A_T32UPC_C_V1-2_FRC_B3.tif200.8 MiB2024-06-12 20:23:40
SENTINEL2X_20240515-000000-000_L3A_T32UPC_C_V1-2_FRC_B4.tif204.8 MiB2024-06-12 20:23:42
SENTINEL2X_20240515-000000-000_L3A_T32UPC_C_V1-2_FRC_B5.tif54.1 MiB2024-06-12 20:23:44
SENTINEL2X_20240515-000000-000_L3A_T32UPC_C_V1-2_FRC_B6.tif58.2 MiB2024-06-12 20:23:44
SENTINEL2X_20240515-000000-000_L3A_T32UPC_C_V1-2_FRC_B7.tif59.9 MiB2024-06-12 20:23:45
SENTINEL2X_20240515-000000-000_L3A_T32UPC_C_V1-2_FRC_B8.tif235.0 MiB2024-06-12 20:23:43
SENTINEL2X_20240515-000000-000_L3A_T32UPC_C_V1-2_FRC_B8A.tif60.0 MiB2024-06-12 20:23:45
SENTINEL2X_20240515-000000-000_L3A_T32UPC_C_V1-2_MTD_ALL.xml23.9 KiB2024-06-12 20:23:46
SENTINEL2X_20240515-000000-000_L3A_T32UPC_C_V1-2_QKL_ALL.jpg413.8 KiB2024-06-12 20:23:46