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/S2_L3A_WASP/files/32/U/PB/2023/SENTINEL2X_20230815-000000-000_L3A_T32UPB_C_V1-2/
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Parent directory/--
DATA/-2023-09-09 08:37:07
MASKS/-2023-09-09 08:37:09
SENTINEL2X_20230815-000000-000_L3A_T32UPB_C_V1-2_FRC_B11.tif57.2 MiB2023-09-09 08:37:28
SENTINEL2X_20230815-000000-000_L3A_T32UPB_C_V1-2_FRC_B12.tif55.7 MiB2023-09-09 08:37:29
SENTINEL2X_20230815-000000-000_L3A_T32UPB_C_V1-2_FRC_B2.tif190.2 MiB2023-09-09 08:37:12
SENTINEL2X_20230815-000000-000_L3A_T32UPB_C_V1-2_FRC_B3.tif201.7 MiB2023-09-09 08:37:15
SENTINEL2X_20230815-000000-000_L3A_T32UPB_C_V1-2_FRC_B4.tif203.3 MiB2023-09-09 08:37:19
SENTINEL2X_20230815-000000-000_L3A_T32UPB_C_V1-2_FRC_B5.tif54.9 MiB2023-09-09 08:37:24
SENTINEL2X_20230815-000000-000_L3A_T32UPB_C_V1-2_FRC_B6.tif58.9 MiB2023-09-09 08:37:25
SENTINEL2X_20230815-000000-000_L3A_T32UPB_C_V1-2_FRC_B7.tif60.0 MiB2023-09-09 08:37:26
SENTINEL2X_20230815-000000-000_L3A_T32UPB_C_V1-2_FRC_B8.tif235.3 MiB2023-09-09 08:37:23
SENTINEL2X_20230815-000000-000_L3A_T32UPB_C_V1-2_FRC_B8A.tif60.2 MiB2023-09-09 08:37:27
SENTINEL2X_20230815-000000-000_L3A_T32UPB_C_V1-2_MTD_ALL.xml25.3 KiB2023-09-09 08:37:29
SENTINEL2X_20230815-000000-000_L3A_T32UPB_C_V1-2_QKL_ALL.jpg418.9 KiB2023-09-09 08:37:29