| Parent directory/ | - | - |
| DATA/ | - | 2021-06-16 12:53:18 |
| MASKS/ | - | 2021-06-16 12:53:20 |
| SENTINEL2X_20210415-000000-000_L3A_T32UMV_C_V1-2_FRC_B11.tif | 57.9 MiB | 2021-06-16 12:53:50 |
| SENTINEL2X_20210415-000000-000_L3A_T32UMV_C_V1-2_FRC_B12.tif | 57.6 MiB | 2021-06-16 12:53:52 |
| SENTINEL2X_20210415-000000-000_L3A_T32UMV_C_V1-2_FRC_B2.tif | 201.3 MiB | 2021-06-16 12:53:25 |
| SENTINEL2X_20210415-000000-000_L3A_T32UMV_C_V1-2_FRC_B3.tif | 208.2 MiB | 2021-06-16 12:53:31 |
| SENTINEL2X_20210415-000000-000_L3A_T32UMV_C_V1-2_FRC_B4.tif | 217.6 MiB | 2021-06-16 12:53:35 |
| SENTINEL2X_20210415-000000-000_L3A_T32UMV_C_V1-2_FRC_B5.tif | 55.9 MiB | 2021-06-16 12:53:44 |
| SENTINEL2X_20210415-000000-000_L3A_T32UMV_C_V1-2_FRC_B6.tif | 58.2 MiB | 2021-06-16 12:53:45 |
| SENTINEL2X_20210415-000000-000_L3A_T32UMV_C_V1-2_FRC_B7.tif | 59.2 MiB | 2021-06-16 12:53:47 |
| SENTINEL2X_20210415-000000-000_L3A_T32UMV_C_V1-2_FRC_B8.tif | 233.6 MiB | 2021-06-16 12:53:41 |
| SENTINEL2X_20210415-000000-000_L3A_T32UMV_C_V1-2_FRC_B8A.tif | 59.5 MiB | 2021-06-16 12:53:49 |
| SENTINEL2X_20210415-000000-000_L3A_T32UMV_C_V1-2_MTD_ALL.xml | 28.1 KiB | 2021-06-16 12:53:52 |
| SENTINEL2X_20210415-000000-000_L3A_T32UMV_C_V1-2_QKL_ALL.jpg | 418.4 KiB | 2021-06-16 12:53:52 |