| Parent directory/ | - | - |
| DATA/ | - | 2021-12-18 18:25:12 |
| MASKS/ | - | 2021-12-18 18:25:13 |
| SENTINEL2B_20211115-000000-000_L3A_T32UMV_C_V1-2_FRC_B11.tif | 27.1 MiB | 2021-12-18 18:25:26 |
| SENTINEL2B_20211115-000000-000_L3A_T32UMV_C_V1-2_FRC_B12.tif | 26.5 MiB | 2021-12-18 18:25:27 |
| SENTINEL2B_20211115-000000-000_L3A_T32UMV_C_V1-2_FRC_B2.tif | 89.7 MiB | 2021-12-18 18:25:15 |
| SENTINEL2B_20211115-000000-000_L3A_T32UMV_C_V1-2_FRC_B3.tif | 96.4 MiB | 2021-12-18 18:25:17 |
| SENTINEL2B_20211115-000000-000_L3A_T32UMV_C_V1-2_FRC_B4.tif | 96.5 MiB | 2021-12-18 18:25:20 |
| SENTINEL2B_20211115-000000-000_L3A_T32UMV_C_V1-2_FRC_B5.tif | 26.6 MiB | 2021-12-18 18:25:23 |
| SENTINEL2B_20211115-000000-000_L3A_T32UMV_C_V1-2_FRC_B6.tif | 27.7 MiB | 2021-12-18 18:25:24 |
| SENTINEL2B_20211115-000000-000_L3A_T32UMV_C_V1-2_FRC_B7.tif | 27.8 MiB | 2021-12-18 18:25:24 |
| SENTINEL2B_20211115-000000-000_L3A_T32UMV_C_V1-2_FRC_B8.tif | 109.6 MiB | 2021-12-18 18:25:22 |
| SENTINEL2B_20211115-000000-000_L3A_T32UMV_C_V1-2_FRC_B8A.tif | 28.0 MiB | 2021-12-18 18:25:25 |
| SENTINEL2B_20211115-000000-000_L3A_T32UMV_C_V1-2_MTD_ALL.xml | 18.3 KiB | 2021-12-18 18:25:27 |
| SENTINEL2B_20211115-000000-000_L3A_T32UMV_C_V1-2_QKL_ALL.jpg | 201.4 KiB | 2021-12-18 18:25:27 |
