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/S2_L3A_WASP/files/32/U/MG/2024/SENTINEL2X_20240415-000000-000_L3A_T32UMG_C_V1-2/
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DATA/-2024-05-13 20:53:32
MASKS/-2024-05-13 20:53:33
SENTINEL2X_20240415-000000-000_L3A_T32UMG_C_V1-2_FRC_B11.tif41.0 MiB2024-05-13 20:53:40
SENTINEL2X_20240415-000000-000_L3A_T32UMG_C_V1-2_FRC_B12.tif40.8 MiB2024-05-13 20:53:41
SENTINEL2X_20240415-000000-000_L3A_T32UMG_C_V1-2_FRC_B2.tif165.5 MiB2024-05-13 20:53:34
SENTINEL2X_20240415-000000-000_L3A_T32UMG_C_V1-2_FRC_B3.tif167.1 MiB2024-05-13 20:53:35
SENTINEL2X_20240415-000000-000_L3A_T32UMG_C_V1-2_FRC_B4.tif166.5 MiB2024-05-13 20:53:37
SENTINEL2X_20240415-000000-000_L3A_T32UMG_C_V1-2_FRC_B5.tif42.5 MiB2024-05-13 20:53:39
SENTINEL2X_20240415-000000-000_L3A_T32UMG_C_V1-2_FRC_B6.tif44.0 MiB2024-05-13 20:53:39
SENTINEL2X_20240415-000000-000_L3A_T32UMG_C_V1-2_FRC_B7.tif44.3 MiB2024-05-13 20:53:40
SENTINEL2X_20240415-000000-000_L3A_T32UMG_C_V1-2_FRC_B8.tif174.6 MiB2024-05-13 20:53:38
SENTINEL2X_20240415-000000-000_L3A_T32UMG_C_V1-2_FRC_B8A.tif44.1 MiB2024-05-13 20:53:40
SENTINEL2X_20240415-000000-000_L3A_T32UMG_C_V1-2_MTD_ALL.xml29.5 KiB2024-05-13 20:53:41
SENTINEL2X_20240415-000000-000_L3A_T32UMG_C_V1-2_QKL_ALL.jpg215.8 KiB2024-05-13 20:53:41