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/S2_L3A_WASP/files/32/U/MG/2021/SENTINEL2X_20210915-000000-000_L3A_T32UMG_C_V1-2/
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DATA/-2021-10-10 04:14:27
MASKS/-2021-10-10 04:14:30
SENTINEL2X_20210915-000000-000_L3A_T32UMG_C_V1-2_FRC_B11.tif38.9 MiB2021-10-10 04:14:54
SENTINEL2X_20210915-000000-000_L3A_T32UMG_C_V1-2_FRC_B12.tif38.5 MiB2021-10-10 04:14:55
SENTINEL2X_20210915-000000-000_L3A_T32UMG_C_V1-2_FRC_B2.tif160.9 MiB2021-10-10 04:14:35
SENTINEL2X_20210915-000000-000_L3A_T32UMG_C_V1-2_FRC_B3.tif162.0 MiB2021-10-10 04:14:39
SENTINEL2X_20210915-000000-000_L3A_T32UMG_C_V1-2_FRC_B4.tif156.5 MiB2021-10-10 04:14:43
SENTINEL2X_20210915-000000-000_L3A_T32UMG_C_V1-2_FRC_B5.tif41.0 MiB2021-10-10 04:14:48
SENTINEL2X_20210915-000000-000_L3A_T32UMG_C_V1-2_FRC_B6.tif41.6 MiB2021-10-10 04:14:49
SENTINEL2X_20210915-000000-000_L3A_T32UMG_C_V1-2_FRC_B7.tif42.1 MiB2021-10-10 04:14:50
SENTINEL2X_20210915-000000-000_L3A_T32UMG_C_V1-2_FRC_B8.tif156.6 MiB2021-10-10 04:14:47
SENTINEL2X_20210915-000000-000_L3A_T32UMG_C_V1-2_FRC_B8A.tif41.5 MiB2021-10-10 04:14:52
SENTINEL2X_20210915-000000-000_L3A_T32UMG_C_V1-2_MTD_ALL.xml32.3 KiB2021-10-10 04:14:55
SENTINEL2X_20210915-000000-000_L3A_T32UMG_C_V1-2_QKL_ALL.jpg218.6 KiB2021-10-10 04:14:55