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/S2_L3A_WASP/files/32/U/MG/2021/SENTINEL2X_20210415-000000-000_L3A_T32UMG_C_V1-2/
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DATA/-2021-06-16 13:10:03
MASKS/-2021-06-16 13:10:07
SENTINEL2X_20210415-000000-000_L3A_T32UMG_C_V1-2_FRC_B11.tif40.7 MiB2021-06-16 13:10:32
SENTINEL2X_20210415-000000-000_L3A_T32UMG_C_V1-2_FRC_B12.tif40.6 MiB2021-06-16 13:10:34
SENTINEL2X_20210415-000000-000_L3A_T32UMG_C_V1-2_FRC_B2.tif161.3 MiB2021-06-16 13:10:11
SENTINEL2X_20210415-000000-000_L3A_T32UMG_C_V1-2_FRC_B3.tif162.2 MiB2021-06-16 13:10:15
SENTINEL2X_20210415-000000-000_L3A_T32UMG_C_V1-2_FRC_B4.tif161.8 MiB2021-06-16 13:10:20
SENTINEL2X_20210415-000000-000_L3A_T32UMG_C_V1-2_FRC_B5.tif42.9 MiB2021-06-16 13:10:26
SENTINEL2X_20210415-000000-000_L3A_T32UMG_C_V1-2_FRC_B6.tif43.4 MiB2021-06-16 13:10:27
SENTINEL2X_20210415-000000-000_L3A_T32UMG_C_V1-2_FRC_B7.tif43.7 MiB2021-06-16 13:10:29
SENTINEL2X_20210415-000000-000_L3A_T32UMG_C_V1-2_FRC_B8.tif165.3 MiB2021-06-16 13:10:24
SENTINEL2X_20210415-000000-000_L3A_T32UMG_C_V1-2_FRC_B8A.tif43.5 MiB2021-06-16 13:10:30
SENTINEL2X_20210415-000000-000_L3A_T32UMG_C_V1-2_MTD_ALL.xml36.5 KiB2021-06-16 13:10:35
SENTINEL2X_20210415-000000-000_L3A_T32UMG_C_V1-2_QKL_ALL.jpg216.6 KiB2021-06-16 13:10:34