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/S2_L3A_WASP/files/32/U/MF/2023/SENTINEL2X_20230815-000000-000_L3A_T32UMF_C_V1-2/
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Parent directory/--
DATA/-2023-09-08 02:15:34
MASKS/-2023-09-08 02:15:36
SENTINEL2X_20230815-000000-000_L3A_T32UMF_C_V1-2_FRC_B11.tif35.8 MiB2023-09-08 02:15:50
SENTINEL2X_20230815-000000-000_L3A_T32UMF_C_V1-2_FRC_B12.tif35.7 MiB2023-09-08 02:15:51
SENTINEL2X_20230815-000000-000_L3A_T32UMF_C_V1-2_FRC_B2.tif155.9 MiB2023-09-08 02:15:38
SENTINEL2X_20230815-000000-000_L3A_T32UMF_C_V1-2_FRC_B3.tif156.5 MiB2023-09-08 02:15:41
SENTINEL2X_20230815-000000-000_L3A_T32UMF_C_V1-2_FRC_B4.tif151.8 MiB2023-09-08 02:15:44
SENTINEL2X_20230815-000000-000_L3A_T32UMF_C_V1-2_FRC_B5.tif39.4 MiB2023-09-08 02:15:47
SENTINEL2X_20230815-000000-000_L3A_T32UMF_C_V1-2_FRC_B6.tif39.6 MiB2023-09-08 02:15:48
SENTINEL2X_20230815-000000-000_L3A_T32UMF_C_V1-2_FRC_B7.tif40.1 MiB2023-09-08 02:15:49
SENTINEL2X_20230815-000000-000_L3A_T32UMF_C_V1-2_FRC_B8.tif149.8 MiB2023-09-08 02:15:47
SENTINEL2X_20230815-000000-000_L3A_T32UMF_C_V1-2_FRC_B8A.tif39.6 MiB2023-09-08 02:15:49
SENTINEL2X_20230815-000000-000_L3A_T32UMF_C_V1-2_MTD_ALL.xml35.1 KiB2023-09-08 02:15:51
SENTINEL2X_20230815-000000-000_L3A_T32UMF_C_V1-2_QKL_ALL.jpg178.7 KiB2023-09-08 02:15:51