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/S2_L3A_WASP/files/32/U/MF/2022/SENTINEL2X_20221215-000000-000_L3A_T32UMF_C_V1-2/
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DATA/-2023-01-13 15:06:49
MASKS/-2023-01-13 15:06:50
SENTINEL2X_20221215-000000-000_L3A_T32UMF_C_V1-2_FRC_B11.tif31.3 MiB2023-01-13 15:07:03
SENTINEL2X_20221215-000000-000_L3A_T32UMF_C_V1-2_FRC_B12.tif31.7 MiB2023-01-13 15:07:03
SENTINEL2X_20221215-000000-000_L3A_T32UMF_C_V1-2_FRC_B2.tif155.3 MiB2023-01-13 15:06:52
SENTINEL2X_20221215-000000-000_L3A_T32UMF_C_V1-2_FRC_B3.tif154.9 MiB2023-01-13 15:06:55
SENTINEL2X_20221215-000000-000_L3A_T32UMF_C_V1-2_FRC_B4.tif131.0 MiB2023-01-13 15:06:57
SENTINEL2X_20221215-000000-000_L3A_T32UMF_C_V1-2_FRC_B5.tif39.1 MiB2023-01-13 15:07:00
SENTINEL2X_20221215-000000-000_L3A_T32UMF_C_V1-2_FRC_B6.tif38.8 MiB2023-01-13 15:07:01
SENTINEL2X_20221215-000000-000_L3A_T32UMF_C_V1-2_FRC_B7.tif38.4 MiB2023-01-13 15:07:02
SENTINEL2X_20221215-000000-000_L3A_T32UMF_C_V1-2_FRC_B8.tif134.8 MiB2023-01-13 15:07:00
SENTINEL2X_20221215-000000-000_L3A_T32UMF_C_V1-2_FRC_B8A.tif36.0 MiB2023-01-13 15:07:02
SENTINEL2X_20221215-000000-000_L3A_T32UMF_C_V1-2_MTD_ALL.xml23.9 KiB2023-01-13 15:07:03
SENTINEL2X_20221215-000000-000_L3A_T32UMF_C_V1-2_QKL_ALL.jpg242.2 KiB2023-01-13 15:07:03