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/S2_L3A_WASP/files/32/U/MF/2021/SENTINEL2X_20210815-000000-000_L3A_T32UMF_C_V1-2/
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DATA/-2021-09-10 08:43:47
MASKS/-2021-09-10 08:43:50
SENTINEL2X_20210815-000000-000_L3A_T32UMF_C_V1-2_FRC_B11.tif36.7 MiB2021-09-10 08:44:07
SENTINEL2X_20210815-000000-000_L3A_T32UMF_C_V1-2_FRC_B12.tif35.9 MiB2021-09-10 08:44:08
SENTINEL2X_20210815-000000-000_L3A_T32UMF_C_V1-2_FRC_B2.tif159.5 MiB2021-09-10 08:43:53
SENTINEL2X_20210815-000000-000_L3A_T32UMF_C_V1-2_FRC_B3.tif160.4 MiB2021-09-10 08:43:57
SENTINEL2X_20210815-000000-000_L3A_T32UMF_C_V1-2_FRC_B4.tif155.6 MiB2021-09-10 08:44:00
SENTINEL2X_20210815-000000-000_L3A_T32UMF_C_V1-2_FRC_B5.tif39.9 MiB2021-09-10 08:44:04
SENTINEL2X_20210815-000000-000_L3A_T32UMF_C_V1-2_FRC_B6.tif39.7 MiB2021-09-10 08:44:05
SENTINEL2X_20210815-000000-000_L3A_T32UMF_C_V1-2_FRC_B7.tif40.2 MiB2021-09-10 08:44:06
SENTINEL2X_20210815-000000-000_L3A_T32UMF_C_V1-2_FRC_B8.tif153.4 MiB2021-09-10 08:44:03
SENTINEL2X_20210815-000000-000_L3A_T32UMF_C_V1-2_FRC_B8A.tif40.0 MiB2021-09-10 08:44:06
SENTINEL2X_20210815-000000-000_L3A_T32UMF_C_V1-2_MTD_ALL.xml33.7 KiB2021-09-10 08:44:08
SENTINEL2X_20210815-000000-000_L3A_T32UMF_C_V1-2_QKL_ALL.jpg189.8 KiB2021-09-10 08:44:08