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/S2_L3A_WASP/files/32/U/MD/2024/SENTINEL2X_20240915-000000-000_L3A_T32UMD_C_V1-2/
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DATA/-2024-10-15 23:37:56
MASKS/-2024-10-15 23:37:57
SENTINEL2X_20240915-000000-000_L3A_T32UMD_C_V1-2_FRC_B11.tif57.5 MiB2024-10-15 23:38:05
SENTINEL2X_20240915-000000-000_L3A_T32UMD_C_V1-2_FRC_B12.tif56.1 MiB2024-10-15 23:38:05
SENTINEL2X_20240915-000000-000_L3A_T32UMD_C_V1-2_FRC_B2.tif177.0 MiB2024-10-15 23:37:58
SENTINEL2X_20240915-000000-000_L3A_T32UMD_C_V1-2_FRC_B3.tif201.4 MiB2024-10-15 23:38:00
SENTINEL2X_20240915-000000-000_L3A_T32UMD_C_V1-2_FRC_B4.tif190.7 MiB2024-10-15 23:38:01
SENTINEL2X_20240915-000000-000_L3A_T32UMD_C_V1-2_FRC_B5.tif55.9 MiB2024-10-15 23:38:03
SENTINEL2X_20240915-000000-000_L3A_T32UMD_C_V1-2_FRC_B6.tif60.4 MiB2024-10-15 23:38:04
SENTINEL2X_20240915-000000-000_L3A_T32UMD_C_V1-2_FRC_B7.tif61.5 MiB2024-10-15 23:38:04
SENTINEL2X_20240915-000000-000_L3A_T32UMD_C_V1-2_FRC_B8.tif241.7 MiB2024-10-15 23:38:03
SENTINEL2X_20240915-000000-000_L3A_T32UMD_C_V1-2_FRC_B8A.tif61.8 MiB2024-10-15 23:38:05
SENTINEL2X_20240915-000000-000_L3A_T32UMD_C_V1-2_MTD_ALL.xml29.5 KiB2024-10-15 23:38:05
SENTINEL2X_20240915-000000-000_L3A_T32UMD_C_V1-2_QKL_ALL.jpg403.6 KiB2024-10-15 23:38:05