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/S2_L3A_WASP/files/32/U/MD/2022/SENTINEL2X_20221215-000000-000_L3A_T32UMD_C_V1-2/
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DATA/-2023-01-13 14:54:34
MASKS/-2023-01-13 14:54:34
SENTINEL2X_20221215-000000-000_L3A_T32UMD_C_V1-2_FRC_B11.tif54.9 MiB2023-01-13 14:54:52
SENTINEL2X_20221215-000000-000_L3A_T32UMD_C_V1-2_FRC_B12.tif53.1 MiB2023-01-13 14:54:53
SENTINEL2X_20221215-000000-000_L3A_T32UMD_C_V1-2_FRC_B2.tif153.6 MiB2023-01-13 14:54:37
SENTINEL2X_20221215-000000-000_L3A_T32UMD_C_V1-2_FRC_B3.tif169.7 MiB2023-01-13 14:54:40
SENTINEL2X_20221215-000000-000_L3A_T32UMD_C_V1-2_FRC_B4.tif167.7 MiB2023-01-13 14:54:43
SENTINEL2X_20221215-000000-000_L3A_T32UMD_C_V1-2_FRC_B5.tif53.3 MiB2023-01-13 14:54:48
SENTINEL2X_20221215-000000-000_L3A_T32UMD_C_V1-2_FRC_B6.tif59.7 MiB2023-01-13 14:54:49
SENTINEL2X_20221215-000000-000_L3A_T32UMD_C_V1-2_FRC_B7.tif60.9 MiB2023-01-13 14:54:50
SENTINEL2X_20221215-000000-000_L3A_T32UMD_C_V1-2_FRC_B8.tif238.2 MiB2023-01-13 14:54:47
SENTINEL2X_20221215-000000-000_L3A_T32UMD_C_V1-2_FRC_B8A.tif61.7 MiB2023-01-13 14:54:51
SENTINEL2X_20221215-000000-000_L3A_T32UMD_C_V1-2_MTD_ALL.xml19.7 KiB2023-01-13 14:54:53
SENTINEL2X_20221215-000000-000_L3A_T32UMD_C_V1-2_QKL_ALL.jpg595.7 KiB2023-01-13 14:54:53