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/S2_L3A_WASP/files/32/U/MC/2024/SENTINEL2X_20240415-000000-000_L3A_T32UMC_C_V1-2/
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DATA/-2024-05-13 20:44:49
MASKS/-2024-05-13 20:44:50
SENTINEL2X_20240415-000000-000_L3A_T32UMC_C_V1-2_FRC_B11.tif57.7 MiB2024-05-13 20:44:58
SENTINEL2X_20240415-000000-000_L3A_T32UMC_C_V1-2_FRC_B12.tif57.0 MiB2024-05-13 20:44:59
SENTINEL2X_20240415-000000-000_L3A_T32UMC_C_V1-2_FRC_B2.tif197.0 MiB2024-05-13 20:44:51
SENTINEL2X_20240415-000000-000_L3A_T32UMC_C_V1-2_FRC_B3.tif210.0 MiB2024-05-13 20:44:53
SENTINEL2X_20240415-000000-000_L3A_T32UMC_C_V1-2_FRC_B4.tif208.3 MiB2024-05-13 20:44:54
SENTINEL2X_20240415-000000-000_L3A_T32UMC_C_V1-2_FRC_B5.tif56.4 MiB2024-05-13 20:44:57
SENTINEL2X_20240415-000000-000_L3A_T32UMC_C_V1-2_FRC_B6.tif60.6 MiB2024-05-13 20:44:57
SENTINEL2X_20240415-000000-000_L3A_T32UMC_C_V1-2_FRC_B7.tif62.0 MiB2024-05-13 20:44:58
SENTINEL2X_20240415-000000-000_L3A_T32UMC_C_V1-2_FRC_B8.tif242.8 MiB2024-05-13 20:44:56
SENTINEL2X_20240415-000000-000_L3A_T32UMC_C_V1-2_FRC_B8A.tif62.2 MiB2024-05-13 20:44:58
SENTINEL2X_20240415-000000-000_L3A_T32UMC_C_V1-2_MTD_ALL.xml19.7 KiB2024-05-13 20:44:59
SENTINEL2X_20240415-000000-000_L3A_T32UMC_C_V1-2_QKL_ALL.jpg485.3 KiB2024-05-13 20:44:59