| Parent directory/ | - | - |
| DATA/ | - | 2022-10-18 05:20:04 |
| MASKS/ | - | 2022-10-18 05:20:06 |
| SENTINEL2X_20220915-000000-000_L3A_T32UMC_C_V1-2_FRC_B11.tif | 58.6 MiB | 2022-10-18 05:20:26 |
| SENTINEL2X_20220915-000000-000_L3A_T32UMC_C_V1-2_FRC_B12.tif | 57.5 MiB | 2022-10-18 05:20:27 |
| SENTINEL2X_20220915-000000-000_L3A_T32UMC_C_V1-2_FRC_B2.tif | 202.4 MiB | 2022-10-18 05:20:09 |
| SENTINEL2X_20220915-000000-000_L3A_T32UMC_C_V1-2_FRC_B3.tif | 211.0 MiB | 2022-10-18 05:20:13 |
| SENTINEL2X_20220915-000000-000_L3A_T32UMC_C_V1-2_FRC_B4.tif | 215.9 MiB | 2022-10-18 05:20:17 |
| SENTINEL2X_20220915-000000-000_L3A_T32UMC_C_V1-2_FRC_B5.tif | 56.7 MiB | 2022-10-18 05:20:22 |
| SENTINEL2X_20220915-000000-000_L3A_T32UMC_C_V1-2_FRC_B6.tif | 59.4 MiB | 2022-10-18 05:20:23 |
| SENTINEL2X_20220915-000000-000_L3A_T32UMC_C_V1-2_FRC_B7.tif | 60.5 MiB | 2022-10-18 05:20:24 |
| SENTINEL2X_20220915-000000-000_L3A_T32UMC_C_V1-2_FRC_B8.tif | 239.3 MiB | 2022-10-18 05:20:21 |
| SENTINEL2X_20220915-000000-000_L3A_T32UMC_C_V1-2_FRC_B8A.tif | 60.8 MiB | 2022-10-18 05:20:25 |
| SENTINEL2X_20220915-000000-000_L3A_T32UMC_C_V1-2_MTD_ALL.xml | 23.9 KiB | 2022-10-18 05:20:27 |
| SENTINEL2X_20220915-000000-000_L3A_T32UMC_C_V1-2_QKL_ALL.jpg | 490.2 KiB | 2022-10-18 05:20:27 |