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/S2_L3A_WASP/files/32/U/MC/2018/SENTINEL2X_20180715-000000-000_L3A_T32UMC_C_V1-2/
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SENTINEL2X_20180715-000000-000_L3A_T32UMC_C_V1-2_FRC_B11.tif58.4 MiB2021-03-16 20:37:03
SENTINEL2X_20180715-000000-000_L3A_T32UMC_C_V1-2_FRC_B12.tif57.1 MiB2021-03-16 20:37:04
SENTINEL2X_20180715-000000-000_L3A_T32UMC_C_V1-2_FRC_B2.tif197.1 MiB2021-03-16 20:37:06
SENTINEL2X_20180715-000000-000_L3A_T32UMC_C_V1-2_FRC_B3.tif206.1 MiB2021-03-16 20:37:08
SENTINEL2X_20180715-000000-000_L3A_T32UMC_C_V1-2_FRC_B4.tif212.6 MiB2021-03-16 20:37:10
SENTINEL2X_20180715-000000-000_L3A_T32UMC_C_V1-2_FRC_B5.tif56.7 MiB2021-03-16 20:37:10
SENTINEL2X_20180715-000000-000_L3A_T32UMC_C_V1-2_FRC_B6.tif58.5 MiB2021-03-16 20:37:10
SENTINEL2X_20180715-000000-000_L3A_T32UMC_C_V1-2_FRC_B7.tif60.1 MiB2021-03-16 20:37:11
SENTINEL2X_20180715-000000-000_L3A_T32UMC_C_V1-2_FRC_B8.tif236.0 MiB2021-03-16 20:37:14
SENTINEL2X_20180715-000000-000_L3A_T32UMC_C_V1-2_FRC_B8A.tif60.4 MiB2021-03-16 20:37:14
SENTINEL2X_20180715-000000-000_L3A_T32UMC_C_V1-2_MTD_ALL.xml32.3 KiB2021-03-16 20:37:14
SENTINEL2X_20180715-000000-000_L3A_T32UMC_C_V1-2_QKL_ALL.jpg512.4 KiB2021-03-16 20:37:14