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/S2_L3A_WASP/files/32/U/MB/2023/SENTINEL2X_20230815-000000-000_L3A_T32UMB_C_V1-2/
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Parent directory/--
DATA/-2023-09-10 02:56:28
MASKS/-2023-09-10 02:56:29
SENTINEL2X_20230815-000000-000_L3A_T32UMB_C_V1-2_FRC_B11.tif57.9 MiB2023-09-10 02:56:48
SENTINEL2X_20230815-000000-000_L3A_T32UMB_C_V1-2_FRC_B12.tif55.9 MiB2023-09-10 02:56:49
SENTINEL2X_20230815-000000-000_L3A_T32UMB_C_V1-2_FRC_B2.tif192.9 MiB2023-09-10 02:56:32
SENTINEL2X_20230815-000000-000_L3A_T32UMB_C_V1-2_FRC_B3.tif207.6 MiB2023-09-10 02:56:35
SENTINEL2X_20230815-000000-000_L3A_T32UMB_C_V1-2_FRC_B4.tif203.9 MiB2023-09-10 02:56:39
SENTINEL2X_20230815-000000-000_L3A_T32UMB_C_V1-2_FRC_B5.tif55.7 MiB2023-09-10 02:56:44
SENTINEL2X_20230815-000000-000_L3A_T32UMB_C_V1-2_FRC_B6.tif60.6 MiB2023-09-10 02:56:45
SENTINEL2X_20230815-000000-000_L3A_T32UMB_C_V1-2_FRC_B7.tif61.7 MiB2023-09-10 02:56:46
SENTINEL2X_20230815-000000-000_L3A_T32UMB_C_V1-2_FRC_B8.tif244.4 MiB2023-09-10 02:56:43
SENTINEL2X_20230815-000000-000_L3A_T32UMB_C_V1-2_FRC_B8A.tif62.0 MiB2023-09-10 02:56:47
SENTINEL2X_20230815-000000-000_L3A_T32UMB_C_V1-2_MTD_ALL.xml21.1 KiB2023-09-10 02:56:49
SENTINEL2X_20230815-000000-000_L3A_T32UMB_C_V1-2_QKL_ALL.jpg390.4 KiB2023-09-10 02:56:49