| Parent directory/ | - | - |
| DATA/ | - | 2023-02-09 15:46:13 |
| MASKS/ | - | 2023-02-09 15:46:13 |
| SENTINEL2B_20230115-000000-000_L3A_T32ULV_C_V1-2_FRC_B11.tif | 56.4 MiB | 2023-02-09 15:46:31 |
| SENTINEL2B_20230115-000000-000_L3A_T32ULV_C_V1-2_FRC_B12.tif | 55.9 MiB | 2023-02-09 15:46:32 |
| SENTINEL2B_20230115-000000-000_L3A_T32ULV_C_V1-2_FRC_B2.tif | 186.3 MiB | 2023-02-09 15:46:16 |
| SENTINEL2B_20230115-000000-000_L3A_T32ULV_C_V1-2_FRC_B3.tif | 193.7 MiB | 2023-02-09 15:46:20 |
| SENTINEL2B_20230115-000000-000_L3A_T32ULV_C_V1-2_FRC_B4.tif | 192.1 MiB | 2023-02-09 15:46:23 |
| SENTINEL2B_20230115-000000-000_L3A_T32ULV_C_V1-2_FRC_B5.tif | 53.6 MiB | 2023-02-09 15:46:27 |
| SENTINEL2B_20230115-000000-000_L3A_T32ULV_C_V1-2_FRC_B6.tif | 56.4 MiB | 2023-02-09 15:46:28 |
| SENTINEL2B_20230115-000000-000_L3A_T32ULV_C_V1-2_FRC_B7.tif | 56.9 MiB | 2023-02-09 15:46:29 |
| SENTINEL2B_20230115-000000-000_L3A_T32ULV_C_V1-2_FRC_B8.tif | 217.2 MiB | 2023-02-09 15:46:27 |
| SENTINEL2B_20230115-000000-000_L3A_T32ULV_C_V1-2_FRC_B8A.tif | 57.3 MiB | 2023-02-09 15:46:30 |
| SENTINEL2B_20230115-000000-000_L3A_T32ULV_C_V1-2_MTD_ALL.xml | 14.2 KiB | 2023-02-09 15:46:32 |
| SENTINEL2B_20230115-000000-000_L3A_T32ULV_C_V1-2_QKL_ALL.jpg | 468.6 KiB | 2023-02-09 15:46:32 |