| Parent directory/ | - | - |
| DATA/ | - | 2022-12-16 16:47:24 |
| MASKS/ | - | 2022-12-16 16:47:25 |
| SENTINEL2X_20221115-000000-000_L3A_T32ULV_C_V1-2_FRC_B11.tif | 57.4 MiB | 2022-12-16 16:47:45 |
| SENTINEL2X_20221115-000000-000_L3A_T32ULV_C_V1-2_FRC_B12.tif | 54.7 MiB | 2022-12-16 16:47:45 |
| SENTINEL2X_20221115-000000-000_L3A_T32ULV_C_V1-2_FRC_B2.tif | 192.1 MiB | 2022-12-16 16:47:28 |
| SENTINEL2X_20221115-000000-000_L3A_T32ULV_C_V1-2_FRC_B3.tif | 207.6 MiB | 2022-12-16 16:47:32 |
| SENTINEL2X_20221115-000000-000_L3A_T32ULV_C_V1-2_FRC_B4.tif | 208.9 MiB | 2022-12-16 16:47:35 |
| SENTINEL2X_20221115-000000-000_L3A_T32ULV_C_V1-2_FRC_B5.tif | 56.0 MiB | 2022-12-16 16:47:40 |
| SENTINEL2X_20221115-000000-000_L3A_T32ULV_C_V1-2_FRC_B6.tif | 61.0 MiB | 2022-12-16 16:47:41 |
| SENTINEL2X_20221115-000000-000_L3A_T32ULV_C_V1-2_FRC_B7.tif | 61.8 MiB | 2022-12-16 16:47:43 |
| SENTINEL2X_20221115-000000-000_L3A_T32ULV_C_V1-2_FRC_B8.tif | 244.1 MiB | 2022-12-16 16:47:39 |
| SENTINEL2X_20221115-000000-000_L3A_T32ULV_C_V1-2_FRC_B8A.tif | 62.2 MiB | 2022-12-16 16:47:44 |
| SENTINEL2X_20221115-000000-000_L3A_T32ULV_C_V1-2_MTD_ALL.xml | 19.7 KiB | 2022-12-16 16:47:46 |
| SENTINEL2X_20221115-000000-000_L3A_T32ULV_C_V1-2_QKL_ALL.jpg | 335.8 KiB | 2022-12-16 16:47:46 |
