| Parent directory/ | - | - |
| DATA/ | - | 2022-11-14 15:17:00 |
| MASKS/ | - | 2022-11-14 15:17:00 |
| SENTINEL2X_20221015-000000-000_L3A_T32ULV_C_V1-2_FRC_B11.tif | 57.0 MiB | 2022-11-14 15:17:20 |
| SENTINEL2X_20221015-000000-000_L3A_T32ULV_C_V1-2_FRC_B12.tif | 55.2 MiB | 2022-11-14 15:17:21 |
| SENTINEL2X_20221015-000000-000_L3A_T32ULV_C_V1-2_FRC_B2.tif | 192.9 MiB | 2022-11-14 15:17:04 |
| SENTINEL2X_20221015-000000-000_L3A_T32ULV_C_V1-2_FRC_B3.tif | 206.5 MiB | 2022-11-14 15:17:07 |
| SENTINEL2X_20221015-000000-000_L3A_T32ULV_C_V1-2_FRC_B4.tif | 206.1 MiB | 2022-11-14 15:17:11 |
| SENTINEL2X_20221015-000000-000_L3A_T32ULV_C_V1-2_FRC_B5.tif | 55.1 MiB | 2022-11-14 15:17:16 |
| SENTINEL2X_20221015-000000-000_L3A_T32ULV_C_V1-2_FRC_B6.tif | 60.2 MiB | 2022-11-14 15:17:17 |
| SENTINEL2X_20221015-000000-000_L3A_T32ULV_C_V1-2_FRC_B7.tif | 61.2 MiB | 2022-11-14 15:17:18 |
| SENTINEL2X_20221015-000000-000_L3A_T32ULV_C_V1-2_FRC_B8.tif | 241.6 MiB | 2022-11-14 15:17:15 |
| SENTINEL2X_20221015-000000-000_L3A_T32ULV_C_V1-2_FRC_B8A.tif | 61.5 MiB | 2022-11-14 15:17:19 |
| SENTINEL2X_20221015-000000-000_L3A_T32ULV_C_V1-2_MTD_ALL.xml | 18.3 KiB | 2022-11-14 15:17:21 |
| SENTINEL2X_20221015-000000-000_L3A_T32ULV_C_V1-2_QKL_ALL.jpg | 362.8 KiB | 2022-11-14 15:17:21 |
