| Parent directory/ | - | - |
| DATA/ | - | 2022-10-18 05:25:11 |
| MASKS/ | - | 2022-10-18 05:25:13 |
| SENTINEL2X_20220915-000000-000_L3A_T32ULV_C_V1-2_FRC_B11.tif | 57.9 MiB | 2022-10-18 05:25:32 |
| SENTINEL2X_20220915-000000-000_L3A_T32ULV_C_V1-2_FRC_B12.tif | 56.3 MiB | 2022-10-18 05:25:33 |
| SENTINEL2X_20220915-000000-000_L3A_T32ULV_C_V1-2_FRC_B2.tif | 196.4 MiB | 2022-10-18 05:25:16 |
| SENTINEL2X_20220915-000000-000_L3A_T32ULV_C_V1-2_FRC_B3.tif | 207.6 MiB | 2022-10-18 05:25:20 |
| SENTINEL2X_20220915-000000-000_L3A_T32ULV_C_V1-2_FRC_B4.tif | 210.5 MiB | 2022-10-18 05:25:23 |
| SENTINEL2X_20220915-000000-000_L3A_T32ULV_C_V1-2_FRC_B5.tif | 55.6 MiB | 2022-10-18 05:25:28 |
| SENTINEL2X_20220915-000000-000_L3A_T32ULV_C_V1-2_FRC_B6.tif | 58.4 MiB | 2022-10-18 05:25:29 |
| SENTINEL2X_20220915-000000-000_L3A_T32ULV_C_V1-2_FRC_B7.tif | 59.5 MiB | 2022-10-18 05:25:30 |
| SENTINEL2X_20220915-000000-000_L3A_T32ULV_C_V1-2_FRC_B8.tif | 236.5 MiB | 2022-10-18 05:25:27 |
| SENTINEL2X_20220915-000000-000_L3A_T32ULV_C_V1-2_FRC_B8A.tif | 59.9 MiB | 2022-10-18 05:25:31 |
| SENTINEL2X_20220915-000000-000_L3A_T32ULV_C_V1-2_MTD_ALL.xml | 22.5 KiB | 2022-10-18 05:25:33 |
| SENTINEL2X_20220915-000000-000_L3A_T32ULV_C_V1-2_QKL_ALL.jpg | 439.3 KiB | 2022-10-18 05:25:33 |
