| Parent directory/ | - | - |
| DATA/ | - | 2022-08-08 18:43:04 |
| MASKS/ | - | 2022-08-08 18:43:07 |
| SENTINEL2X_20220715-000000-000_L3A_T32ULV_C_V1-2_FRC_B11.tif | 57.8 MiB | 2022-08-08 18:43:33 |
| SENTINEL2X_20220715-000000-000_L3A_T32ULV_C_V1-2_FRC_B12.tif | 56.3 MiB | 2022-08-08 18:43:34 |
| SENTINEL2X_20220715-000000-000_L3A_T32ULV_C_V1-2_FRC_B2.tif | 195.0 MiB | 2022-08-08 18:43:11 |
| SENTINEL2X_20220715-000000-000_L3A_T32ULV_C_V1-2_FRC_B3.tif | 205.5 MiB | 2022-08-08 18:43:16 |
| SENTINEL2X_20220715-000000-000_L3A_T32ULV_C_V1-2_FRC_B4.tif | 210.3 MiB | 2022-08-08 18:43:21 |
| SENTINEL2X_20220715-000000-000_L3A_T32ULV_C_V1-2_FRC_B5.tif | 55.8 MiB | 2022-08-08 18:43:27 |
| SENTINEL2X_20220715-000000-000_L3A_T32ULV_C_V1-2_FRC_B6.tif | 58.2 MiB | 2022-08-08 18:43:28 |
| SENTINEL2X_20220715-000000-000_L3A_T32ULV_C_V1-2_FRC_B7.tif | 59.7 MiB | 2022-08-08 18:43:30 |
| SENTINEL2X_20220715-000000-000_L3A_T32ULV_C_V1-2_FRC_B8.tif | 236.2 MiB | 2022-08-08 18:43:26 |
| SENTINEL2X_20220715-000000-000_L3A_T32ULV_C_V1-2_FRC_B8A.tif | 59.9 MiB | 2022-08-08 18:43:32 |
| SENTINEL2X_20220715-000000-000_L3A_T32ULV_C_V1-2_MTD_ALL.xml | 26.7 KiB | 2022-08-08 18:43:35 |
| SENTINEL2X_20220715-000000-000_L3A_T32ULV_C_V1-2_QKL_ALL.jpg | 462.4 KiB | 2022-08-08 18:43:35 |
