| Parent directory/ | - | - |
| DATA/ | - | 2022-04-10 08:02:25 |
| MASKS/ | - | 2022-04-10 08:02:27 |
| SENTINEL2X_20220315-000000-000_L3A_T32ULV_C_V1-2_FRC_B11.tif | 57.8 MiB | 2022-04-10 08:02:53 |
| SENTINEL2X_20220315-000000-000_L3A_T32ULV_C_V1-2_FRC_B12.tif | 56.6 MiB | 2022-04-10 08:02:54 |
| SENTINEL2X_20220315-000000-000_L3A_T32ULV_C_V1-2_FRC_B2.tif | 195.8 MiB | 2022-04-10 08:02:31 |
| SENTINEL2X_20220315-000000-000_L3A_T32ULV_C_V1-2_FRC_B3.tif | 205.2 MiB | 2022-04-10 08:02:36 |
| SENTINEL2X_20220315-000000-000_L3A_T32ULV_C_V1-2_FRC_B4.tif | 215.0 MiB | 2022-04-10 08:02:41 |
| SENTINEL2X_20220315-000000-000_L3A_T32ULV_C_V1-2_FRC_B5.tif | 55.9 MiB | 2022-04-10 08:02:47 |
| SENTINEL2X_20220315-000000-000_L3A_T32ULV_C_V1-2_FRC_B6.tif | 58.9 MiB | 2022-04-10 08:02:48 |
| SENTINEL2X_20220315-000000-000_L3A_T32ULV_C_V1-2_FRC_B7.tif | 59.7 MiB | 2022-04-10 08:02:50 |
| SENTINEL2X_20220315-000000-000_L3A_T32ULV_C_V1-2_FRC_B8.tif | 234.7 MiB | 2022-04-10 08:02:46 |
| SENTINEL2X_20220315-000000-000_L3A_T32ULV_C_V1-2_FRC_B8A.tif | 60.1 MiB | 2022-04-10 08:02:52 |
| SENTINEL2X_20220315-000000-000_L3A_T32ULV_C_V1-2_MTD_ALL.xml | 30.9 KiB | 2022-04-10 08:02:55 |
| SENTINEL2X_20220315-000000-000_L3A_T32ULV_C_V1-2_QKL_ALL.jpg | 405.7 KiB | 2022-04-10 08:02:55 |