| Parent directory/ | - | - |
| DATA/ | - | 2022-01-13 19:21:29 |
| MASKS/ | - | 2022-01-13 19:21:30 |
| SENTINEL2B_20211115-000000-000_L3A_T32ULV_C_V1-2_FRC_B11.tif | 55.1 MiB | 2022-01-13 19:21:56 |
| SENTINEL2B_20211115-000000-000_L3A_T32ULV_C_V1-2_FRC_B12.tif | 52.8 MiB | 2022-01-13 19:21:58 |
| SENTINEL2B_20211115-000000-000_L3A_T32ULV_C_V1-2_FRC_B2.tif | 183.7 MiB | 2022-01-13 19:21:35 |
| SENTINEL2B_20211115-000000-000_L3A_T32ULV_C_V1-2_FRC_B3.tif | 195.6 MiB | 2022-01-13 19:21:39 |
| SENTINEL2B_20211115-000000-000_L3A_T32ULV_C_V1-2_FRC_B4.tif | 199.2 MiB | 2022-01-13 19:21:44 |
| SENTINEL2B_20211115-000000-000_L3A_T32ULV_C_V1-2_FRC_B5.tif | 52.9 MiB | 2022-01-13 19:21:50 |
| SENTINEL2B_20211115-000000-000_L3A_T32ULV_C_V1-2_FRC_B6.tif | 57.1 MiB | 2022-01-13 19:21:52 |
| SENTINEL2B_20211115-000000-000_L3A_T32ULV_C_V1-2_FRC_B7.tif | 57.8 MiB | 2022-01-13 19:21:53 |
| SENTINEL2B_20211115-000000-000_L3A_T32ULV_C_V1-2_FRC_B8.tif | 229.1 MiB | 2022-01-13 19:21:49 |
| SENTINEL2B_20211115-000000-000_L3A_T32ULV_C_V1-2_FRC_B8A.tif | 58.4 MiB | 2022-01-13 19:21:55 |
| SENTINEL2B_20211115-000000-000_L3A_T32ULV_C_V1-2_MTD_ALL.xml | 15.5 KiB | 2022-01-13 19:21:58 |
| SENTINEL2B_20211115-000000-000_L3A_T32ULV_C_V1-2_QKL_ALL.jpg | 309.0 KiB | 2022-01-13 19:21:58 |
