| Parent directory/ | - | - |
| DATA/ | - | 2022-12-14 14:31:39 |
| MASKS/ | - | 2022-12-14 14:31:40 |
| SENTINEL2X_20221115-000000-000_L3A_T32ULC_C_V1-2_FRC_B11.tif | 58.1 MiB | 2022-12-14 14:31:59 |
| SENTINEL2X_20221115-000000-000_L3A_T32ULC_C_V1-2_FRC_B12.tif | 56.1 MiB | 2022-12-14 14:32:00 |
| SENTINEL2X_20221115-000000-000_L3A_T32ULC_C_V1-2_FRC_B2.tif | 199.7 MiB | 2022-12-14 14:31:43 |
| SENTINEL2X_20221115-000000-000_L3A_T32ULC_C_V1-2_FRC_B3.tif | 210.8 MiB | 2022-12-14 14:31:46 |
| SENTINEL2X_20221115-000000-000_L3A_T32ULC_C_V1-2_FRC_B4.tif | 211.7 MiB | 2022-12-14 14:31:50 |
| SENTINEL2X_20221115-000000-000_L3A_T32ULC_C_V1-2_FRC_B5.tif | 56.5 MiB | 2022-12-14 14:31:55 |
| SENTINEL2X_20221115-000000-000_L3A_T32ULC_C_V1-2_FRC_B6.tif | 61.5 MiB | 2022-12-14 14:31:56 |
| SENTINEL2X_20221115-000000-000_L3A_T32ULC_C_V1-2_FRC_B7.tif | 62.3 MiB | 2022-12-14 14:31:57 |
| SENTINEL2X_20221115-000000-000_L3A_T32ULC_C_V1-2_FRC_B8.tif | 245.1 MiB | 2022-12-14 14:31:54 |
| SENTINEL2X_20221115-000000-000_L3A_T32ULC_C_V1-2_FRC_B8A.tif | 62.6 MiB | 2022-12-14 14:31:58 |
| SENTINEL2X_20221115-000000-000_L3A_T32ULC_C_V1-2_MTD_ALL.xml | 25.3 KiB | 2022-12-14 14:32:00 |
| SENTINEL2X_20221115-000000-000_L3A_T32ULC_C_V1-2_QKL_ALL.jpg | 363.9 KiB | 2022-12-14 14:32:00 |
