| Parent directory/ | - | - |
| DATA/ | - | 2022-04-10 08:35:27 |
| MASKS/ | - | 2022-04-10 08:35:29 |
| SENTINEL2X_20220315-000000-000_L3A_T32ULC_C_V1-2_FRC_B11.tif | 57.9 MiB | 2022-04-10 08:35:55 |
| SENTINEL2X_20220315-000000-000_L3A_T32ULC_C_V1-2_FRC_B12.tif | 57.0 MiB | 2022-04-10 08:35:57 |
| SENTINEL2X_20220315-000000-000_L3A_T32ULC_C_V1-2_FRC_B2.tif | 202.8 MiB | 2022-04-10 08:35:33 |
| SENTINEL2X_20220315-000000-000_L3A_T32ULC_C_V1-2_FRC_B3.tif | 209.9 MiB | 2022-04-10 08:35:38 |
| SENTINEL2X_20220315-000000-000_L3A_T32ULC_C_V1-2_FRC_B4.tif | 217.5 MiB | 2022-04-10 08:35:43 |
| SENTINEL2X_20220315-000000-000_L3A_T32ULC_C_V1-2_FRC_B5.tif | 56.5 MiB | 2022-04-10 08:35:49 |
| SENTINEL2X_20220315-000000-000_L3A_T32ULC_C_V1-2_FRC_B6.tif | 60.0 MiB | 2022-04-10 08:35:51 |
| SENTINEL2X_20220315-000000-000_L3A_T32ULC_C_V1-2_FRC_B7.tif | 60.9 MiB | 2022-04-10 08:35:52 |
| SENTINEL2X_20220315-000000-000_L3A_T32ULC_C_V1-2_FRC_B8.tif | 238.7 MiB | 2022-04-10 08:35:48 |
| SENTINEL2X_20220315-000000-000_L3A_T32ULC_C_V1-2_FRC_B8A.tif | 61.2 MiB | 2022-04-10 08:35:54 |
| SENTINEL2X_20220315-000000-000_L3A_T32ULC_C_V1-2_MTD_ALL.xml | 40.6 KiB | 2022-04-10 08:35:57 |
| SENTINEL2X_20220315-000000-000_L3A_T32ULC_C_V1-2_QKL_ALL.jpg | 454.4 KiB | 2022-04-10 08:35:57 |
